Five of the PLC program design cycle, rounding - scanning step

1 CPU self-checking CPU self-checking phase including CPU from diagnostic testing and monitoring of reset timer.

in the diagnostic testing, to detect the state of PLC controller module, CPU if abnormal immediate diagnosis and treatment, fault signal is given at the same time, light up the CPU on the front panel LED indicators. When a fatal error, the CPU was forced to STOP, STOP the execution procedure. The CPU as diagnostic tests will help to prompt discovery or fault early warning system, improve the reliability of the system.

monitoring timer is also called WDT watchdog timer, it is a hardware within the CPU clock, time each scanning is to monitor PLC controller. CPU run a set of regulations before the scan time, each scan cycle to monitor the scanning time is more than a specified value. So that you can avoid the PLC controller in the process of executing programs into dead circulation, or due to PLC to execute programs unscheduled system failure, leading to system paralysis. If the program is running normal in each scan cycle of internal processing stage to reset (WDT Reset) 。 If the program is run wrong into an infinite loop, the WDT not reset and trigger the timeout overflow in time, the CPU will give alarm signal or stop working. The WDT technology is an effective measure to enhance the reliability of the system.

2 communication processing stage

3 read input in read input stage, PLC to scan all the input terminal, and the on/off state at the input in the corresponding to the input image register, set the value of the input image to register. Since then, the input image register isolation with the outside world, no matter how changes in peripheral inputs, the input image will not change the contents of a register. The input state changes can only be read input of the next cycle scan cycle were picked up. So that you can guarantee in a cyclical scan cycle using the same state of the input signal. Therefore, attention should be paid to the input signal is greater than the width of a scan cycle, otherwise it may cause the loss of the signal.

4 execution stage programmable controller of the user program is composed of several instruction, instruction in sequence in the memory. When PLC execute a program in the run mode, the CPU to the user program in order to scan. If a program expressed in ladder diagram, the press after the first down, from left to right in order to perform a detailed application instructions. Each scan to an instruction, the state of the input signals are needed to read from the input image register, rather than directly use the input terminal of the on/off state. In the process of execution of user programs, according to the instruction to do the corresponding operation or process, each time the result of the operation is not directly to the output terminal immediately drive external load, but the result will be written to the output image register first. Behind the values in the output image register can be used to read instructions.

5 refresh the output phase after the execution of the user program, enter the output refresh stage. Programmable controller to send on/off state of the output image register to the output latch, drives through the output terminal user output device or load, realize the control function. The value of the output latch remained till the next refresh the output.

at the end of the output refresh stage, CPU scan cycle to the next cycle.

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